Making sense of ADC specs – Part 2 : SNR Vs DR

Many times in ADC data sheets, both SNR (Signal to Noise ratio) and DR (Dynamic range) are specified. These parameters are usually defined as follows.

“Signal to Noise ratio is the ratio of maximum output signal amplitude to the output noise level not including harmonics or dc.

Dynamic range is ratio of largest to the small signal that can be resolved.”

Looking at these definitions, I couldn’t tell the difference between these parameters. I couldn’t figure out how DR can be larger than SNR. Later I realized that, SNR and DR for ADC should be same for an ADC unless, Noise floor in the ADC changes depending on input level.                                     

This is the case with almost all ADCs. For example take effect of clock jitter on ADC performance. As effect of jitter is more prominent with increase in signal amplitude, noise floor because of clock jitter decreases with reduction in signal amplitude. This will cause DR to be higher than SNR.

Another example is effect of reference noise in differential SAR ADCs. When converting small differential amplitude inputs, reference noise won’t effect output ADC. This is because the transfer function from reference to both inputs of comparator will look alike in that case. So as input amplitude decreases, noise floor because of reference also scales down in this case. This can cause SNR to be lower than DR in case of SAR ADCs.

Another example is with Sigma Delta converters where SNR degrades beyond maximum stable amplitude. So DR will be higher than SNR in this case as well.

SNR Vs DNR figure

SNR and DR for a state of art  Sigma-Delta ADC (DR=103dB and SNR=98.9dB in this example) [1]

So if we realize that noise floor need not stay same for all inputs, it will be clear on why DR and SNR can be different.

References

  1. A. Sukumaran and S.Pavan, “Low Power Design Techniques for Single-Bit Audio Continuous-Time Delta Sigma ADCs Using FIR Feedback,” IEEE Journal of Solid State Circuits, Nov. 2014.

 

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Quantization

Before discussing ADC specs further, I thought it would be appropriate to discuss what ADC does in detail. ADC converts an analog signal (continuous in time and continuous in amplitude) to a digital representation(Discrete in time and discrete in amplitude).
The discretization of time is called sampling and the discretization of  amplitude is called quantization. So essentially the analog-to-digital conversion is a combination of sampling and quantization. I’ll discuss about quantization in this post.

Let’s say we have a analog signal of amplitude 0-5V and we want to convert it to a digital signal using a 3 bit ADC. A three bit digital signal will have 8 level associated with it (From 000 to 111). So we can divide the input range into 8 equal segments and associate each segment with a digital level. This is what is called uniform quantization and usually implemented in all commercial ADCs.  In the process of quantization, we’re throwing away some information. This difference between input signal and quantized signal is called as quantization error.  Having more number of bits in digital signal means having  better estimate of input i.e., less quantization error. For modeling purposes, the digital signal at the output can be considered to be sum of a clean analog signal and quantization noise which represents quantization error. (Although this quantization noise is not really a random signal).
The transfer function of this sort of quantization is shown in below figure.

Uniform SamplingA conventional ADC does not take into account the statistics of input signal. It is optimal for uniformly distributed signals because we split the input range into equal segments and assign each to a digital level. Knowing the statistics of the input signal is beneficial in quantizer design. For example, if the input signal is known to concentrate around a certain value x, one can design an ADC that has small quantization step sizes in the regions around x, and larger quantization step sizes in other regions. This design effectively reduces the quantization errors for most of the input values, resulting in small average quantization error. This sort of quantization is called non-uniform quantization. For comparison, the transfer functions of ADC having uniform quantizer and non uniform quantizer are shown below.

nonuniform_quantizationThere are several ways to implement non uniform quantization.

  1. Use an amplifier with non linear gain and apply resultant signal to uniform quantizer. This technique is commonly termed as companding.
  2. Adjust the ADC quantization levels directly. For example the threshold values can be varied in a flash converter by varying the resistor string.
  3. Have a uniform quantizer and use a look up table kind of approach to generate non uniform quantized values.

One common application of this non uniform quantizer can be found in speech communication. Audio and voice signals have higher-densities of smaller values. Different companding techniques like μ-law and A-law are used to take advantage of such input-distribution.

As usual  if you’ve any suggestions or comments, please post them in comments section.

References

  1. Analog-to-Digital converter design for non uniform quantization by Syed Arsalan Jawed, Master’s thesis, Linkoping University.
    http://liu.diva-portal.org/smash/get/diva2:19990/FULLTEXT01
  2. Analysis and dynamic range enhancement of the analog-to- digital interface in multi mode radio receivers by Brian L Fox, Master’s thesis, Virginia  polytechnic institute and  state university.
    http://www2.elo.utfsm.cl/~ipd465/Papers%20y%20apuntes%20varios/quantizacion.pdf
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Making sense of ADC specs – Part 1

I’ve been thinking about what to write here for quite some time. There are so many things I want to discuss. I’ll start with discussing ADC specifications.

Like any other analog block, you can’t represent entire ADC performance with just one or two specifications. It’s essential for both ADC designers and system level engineers to understand all the specifications properly.

One can find some/most of these specifications in an ADC datasheet.
*********************************************
Related to resolution
Resolution
Effective resolution
Noise free resolution
Effective number of bits (ENOB)

Related to analog input
Voltage range
Common mode input range
Input impedance

Related to sampling dynamics
Throughput
Acquisition time
Transient response
Aperture delay
Aperture jitter
-3dB input bandwidth

DC specifications
Differential linearity error (DNL)
Integral linearity error (INL)
Gain error
Gain error drift
Offset error
Offset error drift
Zero error
Zero error drift

AC specifications
Dynamic range
Signal-to-Noise ratio (SNR)
Spurious-free dynamic range (SFDR)
Total harmonic distortion (THD)
Signal-to-(Noise+Distortion) – SINAD

*********************************************

I’ll talk about “Resolution” today. This may be most strange thing for some one who is new to ADC. What does  it mean when it’s mentioned that resolution of a ADC is 12 bits.

a) Will the SNR of that ADC corresponds to 73.7dB (corresponding to 6N+1.6 dB) ?
Usually not. If you can calculate signal to quantization noise of that ADC, it will be 6N+1.6 dB. Usually other thermal noise from various blocks in ADC can degrade it’s SNR from 6N+1.6dB.

b) Will DNL of that ADC is less than 1LSB at 12 bit level ?
Again don’t have to be. So if you’re looking to make a 12 bit accurate system, you should look at DNL/INL specifications rather than resolution.

So what does it mean then ?  It just means that the ADC gives output which is 12 bit representation of the input.

There are couple of other resolution like specifications, which give more insight into accuracy of the ADC. “Noise free resolution” and “Effective resolution” measure ADC performance essentially at DC. All you’ve to know to calculate these specifications are  ADC input range and noise.

Effective resolution = log2 (FS input voltage/RMS noise)
Noise free resolution = log2 (FS input voltage/peak-peak noise)

Under identical conditions, effective resolution is going to be larger than noise free resolution. Noise free resolution has a physical significance. If you take a 20-bit ADC whose noise free resolution is 16 that means last four bits of the digital output keeps flickering.

“Effective number of bits” (ENOB) calculation takes both noise and spectral distortion at that particular sampling frequency.

ENOB = (Signal to noise and distortion ratio-1.76)/6.02

If  these  four specifications are mentioned for an ADC (which never happens), we can understand how many bits ADC output will have, how good is it’s DC performance and how it’s dynamic performance is at a particular sampling frequency.

I’ll discuss few other specifications in my next post. If you have any suggestions/comments, please add them comments section.

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Hello World

Hello world !! Finally I created a blog but I am not sure what to post first. I told one of my friends that I am going to start a blog on analog design. His first response was what’s the name you are giving to the blog. I didn’t think of any name until then. After struggling for almost half a day, I came up with this one.

Analog Quantized ? What does that even mean ?                                                                           My job is to quantize the analog concepts so that it will be easy for readers to understand  those concepts. Ergo, the name analog quantized.. 🙂

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